Ethernet 10G MAC Core
The Ethernet 10G MAC core is a configurable core that supports Ethernet speeds up to 10 Gbps in full duplex transfer mode. The core complies with the IEEE Std. 802.3-2008 specification and operates at a frequency of 156.25 MHz.
Additionally, the Ethernet 10G MAC core is designed to interact with the user’s logic and the FPGA Ethernet 10G physical coding sublayer (PCS) as shown in Ethernet 10G MAC Core Interaction with User’s Logic and the FPGA Ethernet 10G PCS block diagram. The interaction between the user’s logic, Ethernet 10G MAC core, and the FPGA PCS are based on a per-lane basis.
At the FPGA transceiver’s end, the APB interface is per quad basis, which is a common interface shared across 4 lanes in the FPGA Ethernet 10G PCS. For more information, see Titanium Ethernet 10GBase-KR User Guide.
Ethernet 10G MAC Core Interaction with User’s Logic and the FPGA Ethernet 10G PCS Block Diagram
Features
- Complies with IEEE Std. 802.3-2008 specification
- Supports 10 Gbps Ethernet in full duplex transfer mode
- Single clock operates at 156.25 MHz
- AXI4 ST 64-bit user interface at transmit and receiver interfaces
- Configurable Cut Through mode to transfer the Ethernet frame with minimum latency
- Configurable Store Forward mode where the entire Ethernet frame is received first before the transfer begins
- Programmable inter packet gap (IPG)
- Automatic padding for short frames
- Frame check sequence and CRC generation, includes checking and forwarding
- Automatic termination of bad frames
- Frame length check based on user-defined MTU frame length
- Automatic frame length check against ETHERTYPE/LEN field for frame
- Broadcast, Unicast, and multicast address filtering
- Flow control through pause frame generation and decoding
- Statistics reporting
User Guide