I2C Core
I2C is a two-wire, bidirectional serial bus that provides a simple, efficient method of data exchange between devices. The I2C core provides an interface between the Trion® FPGA and an I2C bus. The core supports master and slave modes.
I2C Master Controller Block Diagram
I2C Slave Controller Block Diagram
Features
- Supports native user interface
- Master and slave operations
- Multi-master operation
- Supports 100 kHz and 400 kHz I2C operation mode
- START, Repeated START and STOP signal generation and detection
- 7-bit slave addressing mode
- Verilog HDL RTL and simulation testbench
- Includes an example design targeting the TrionĀ® T20 BGA256 Development Board and Titanium Ti60 F225 Development Board
- Supports all Trion and Titanium FPGAs
User Guide