Linux + RISC-V Sapphire SoC

“Linux Ready” Embedded RISC-V Soft Processor

The Sapphire SoC, a configurable RISC-V soft-core processor is the first in the market to be “Linux ready,” offering an integrated Buildroot toolchain, an automated Linux kernel tree generator, and driver, user space, and library examples.

Linux plus RISC-V

Linux penguin created by lewing@isc.tamu.edu using The GIMP software.

Other solutions, such as microcontrollers (MCUs) and FPGAs that include a hard processor (FPGA SoCs), have significant downsides: MCUs are too resource constrained to run Linux effectively, and FPGA SoCs consume too much power and can be cost prohibitive. In contrast, the free Sapphire SoC running on an Efinix® Trion® or Titanium FPGA supports baremetal, RTOS, and Linux solutions all in a single hardware platform.

Linux vs. RTOS vs. Bare Metal

Linux RTOS Bare Metal

Full fledge operating system

  • Task scheduler
  • File System
  • Networking TCP/IP stack
  • Multiprocessing
    • Mutex or semaphore for synchronization
  • Multi-user
  • Portable
  • Open Source

Real Time Operating System

  • Predictable and deterministic.
    Deterministic means repeatingthe input will result the output
  • Priority based scheduling
  • File system
  • Networking TCP/IP stack
  • Portable
  • Open Source

Physical device dedicated to run a single application

  • A firmware that directly run onhardware without OS
  • No task scheduler
  • No file system
  • Not portable

A high-level operating system like Linux allows for rapid application development and deployment, supports hardware abstraction, and is scalable and portable. You can use the Linux environment to run an AI application, control sensors, and more. For even more compute power, enable the Sapphire SoC’s multi-core support in the Efinity IP Manager to configure up to 4 VexRiscv processors.

Linux Solution

Building a Linux kernel can be tedious without the proper tools. Efinix provides a Linux stack configuration repo (BR2-Efinix) based on Buildroot for building the Linux kernel.

BR2-Efinix

BR2-Efinix

BR2-Efinix is a custom Buildroot external tree for building Linux for the Sapphire RISC-V SoC. This repo includes OpenSBI, U-boot, Linux, and Buildroot configuration files as well as patches. Download the repo from Github at https://github.com/Efinix-Inc/br2-efinix.

Buildroot

Buildroot

OpenSBI

OpenSBI

Buildroot

U-Boot

Drivers

Drivers

Device Tree Generator

Device Tree Generator

Buildroot

The open-source Buildroot project automates the process of building bootable Linux systems by leveraging the cross-compilation toolchain. Buildroot includes a variety of libraries such as the C standard library and OpenCV, making integration easier. Efinix has a Buildroot configuration for building a bootable Linux environment that you can use with these Efinix boards:

The configuration includes a bootloader (OpenSBI v0.9 and U-boot v2021.04) and the Linux kernel v5.10, which rely on the RISC-V cross-GCC v8.4.0. To learn more about Buildroot, visit their website.

OpenSBI

The OpenSBI project provides an open-source reference implementation of the RISC-V Supervisor Binary Interface (SBI) specifications for platform-specific firmware executing in M-mode. Learn more at the OpenSBI repository.

U-Boot

U-Boot is a bootloader for embedded boards based on a variety of processors such as RISC-V, PowerPC, ARM, MIPS, and others. U-Boot can be installed in a boot ROM and used to initialize and test the hardware, or to download and run application code. Learn more at the U-Boot repository.

Drivers

Efinix provides Linux drivers for the Sapphire SoC peripherals, such as the APB3, UART, SPI, GPIO, and DMA. Each driver also comes with an example application that illustrates the driver usage.

Device Tree Generator

The device tree generator script leverages your Efinity project to describe the SoC-level peripherals that are consumed by the Linux kernel during initialization. Because the Sapphire SoC is configurable, you need to update the device tree when you change the SoC or peripherals. With this script, the developer can easily re-generate the device tree file.

RISC-V Boot Sequence

The following figure shows the boot sequence for Linux on an Efinix development board. When the board powers on, the first stage bootloader copies OpenSBI and U-Boot from the SPI flash to external memory (RAM). Next, OpenSBI is executed to initialize the memory, stack pointer, and CPUs. Then, U-Boot loads the Linux kernel and starts Linux.

Efinix TinyML Flow

Development Flow

The development flow is divided into hardware and software. The hardware side generates the SoC FPGA bitstream. The software side builds the Linux kernel and related user space packages.

Linux Development Fow

What's Next?

To help you get started building your own applications, Efinix provides Linux bus drivers such as SPI, UART, APB3, GPIO, and DMA as well as user space package examples for the corresponding driver. Additionally, the repo includes example OpenCV applications such as canny, cv2_detection, and cv2_tracking that showcase the multi-core feature of the Sapphire SoC. 

Visit the Br2-efinix repository to explore more.