The Titanium Ti375 N1156 FPGA's full-duplex transceivers support multiple protocols including PCIe® Gen4 with data rates up to 16 Gbps, Ethernet 10GBase-KR, and Ethernet SGMII as well as a PMA Direct mode with data rates up to 12.5 Gbps. The PCIe and Ethernet transceivers have a hardened PCS, which makes them easy to implement and use. Additionally, the Ti375 FPGA includes a 1 GHz quad-core RISC-V block with a custom instruction interface, a hardened MIPI D-PHY supporting up to 2.5 Gbps per lane and hardened LPDDR4/4x controllers with 100 Gbps external memory bandwidth.

You can use the Ti375 N1156 development board to interface with a general-purpose CPU through the PCIe link. This board is preloaded with an example design to show how to configure the PCIe link between CPU and this board. With the SFP+ receptacles, it can be used for data transmission through the 10G Ethernet interface.

The board supports simultaneous debugging of the Ti375 FPGA's operation with the Efinity® Debugger and the RISC-V SoC's software with the Efinity RISC-V Embedded Software IDE. Additionally, the board has an array of on-board interfaces such as FMC (HPC) interfaces and QSE interfaces to expand the board’s connectivity.

With the development kit, you get a free license for the Efinity® software with 1 year of upgrades. You can request another year of maintenance for free at any time. The Efinity software provides a complete tool flow from RTL design to bitstream generation, including synthesis, place-and-route, debugging, and timing analysis.

Features

• Efinix Ti375N1156C4⁽¹⁾ FPGA in a 1,156-ball FineLine BGA package
• Two 8 Gbit (32 Mbit x 16 DQ x 8 banks x 2 channels) LPDDR4 or LPDDR4x SDRAMs:
  • Supports x32 data width
  • Read/write speed up to 3.3 Gbps
• Two 512 Mbit SPI NOR flash memories:
  • Supports single, dual, and quad mode for each SPI flash
  • Supports x8 with both SPI flash devices in quad mode
• 8 GByte eMMC
• Four high-speed QSE connectors that support up to 8 channels (4 data lanes + 1 clock lane) TX/RX MIPI interfaces or LVDS/GPIO:
  • Two 1.5 Gbps TX/RX soft MIPI interfaces
  • Three 2.5 Gbps TX hard MIPI interfaces
  • Three 2.5 Gbps RX hard MIPI interfaces
• Four SFP+ receptacles for transceiver interface
• One PCIe edge card connector
• Gigabit Ethernet interface supporting RGMII standard and complies with 10Base-T, 100Base-TX, and 1000Base-T IEEE 802.3 standards
• Micro-SD card slot
• Two FPGA mezzanine cards (FMC) with high pin-count (HPC) connectors
• USB type-C connector to configure the development board
• 25, 33.33, 74.25, 100, and 156.25 MHz oscillators for Ti375 clock input
• Cooling fan
• Six User LEDs and two pushbutton switches
• Power:
  • 12.0 V power supply connector
  • On-board regulator sources: 0.85 V, 0.95 V, 1.1 V, 1.2 V, 1.8 V, 3.3 V, 5.0 V
• Power good and Ti375 configuration done LEDs

⁽¹⁾ The FPGA speed grade may vary and is subject to availability.